DocumentCode
2370066
Title
P-i-n junction in silicon nanowires
Author
Foo, K.L. ; Rusli ; Yu, M.B. ; Singh, Navab ; Buddharaju, K.D. ; Sun, Yeali S. ; Chan, Louiza ; Ng, C.M.
Author_Institution
Sch. of Eng., Nanyang Technol. Univ., Singapore
fYear
2008
fDate
24-27 March 2008
Firstpage
1137
Lastpage
1139
Abstract
P-i-n junctions were fabricated along silicon nanowires of about 8 nm in cross-sectional dimension via the conventional top-down approach. Rectifying electrical characteristics have been observed and the ideality factor is estimated to be 3.8, attributed to trapped charges in the encapsulating silicon dioxide layer. Dopants diffusion along the nanowires reduces the effective length of the intrinsic region. The reverse bias breakdown exhibiting a negative temperature coefficient could be attributed to tunneling effect. The p-i-n junctions respond well to illumination despite their small capture area and preliminary results on photoresponse will be presented.
Keywords
elemental semiconductors; nanotechnology; nanowires; p-i-n photodiodes; p-n junctions; silicon; Si; dopants diffusion; ideality factor; negative temperature coefficient; p-i-n junction; p-i-n photodiodes; rectifying electrical characteristics; reverse bias breakdown; silicon dioxide layer; silicon nanowires; trapped charges; tunneling effect; Nanoelectronics; Nanowires; PIN photodiodes; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoelectronics Conference, 2008. INEC 2008. 2nd IEEE International
Conference_Location
Shanghai
Print_ISBN
978-1-4244-1572-4
Electronic_ISBN
978-1-4244-1573-1
Type
conf
DOI
10.1109/INEC.2008.4585682
Filename
4585682
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