Title :
An on-chip 3MB subarray-based 3rd level cache on an itanium microprocessor
Author :
Weiss, D. ; Wuu, J.J. ; Chin, V.
Author_Institution :
Hewlett-Packard Company
Keywords :
Adaptive arrays; Clocks; Decoding; Driver circuits; Feedback circuits; Flexible printed circuits; Latches; Logic arrays; Microprocessors; Repeaters;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992132
