Combining message switching with circuit switching in the Interconnection Cached Multiprocessor Network

In distributed memory parallel machines, data access times can vary greatly depending on data location. This makes locality considerations important for improving performance. Switching locality is a special kind of locality which conventional networks fail to exploit fully. It refers to the phenomenon in which each computation entity in a parallel application switches most of its communication between a small set of other entities. Furthermore, the membership of these sets changes infrequently. Switching locality arises naturally in many parallel applications. The Interconnection Cached Network (ICN) is a reconfigurable network especially well suited to exploiting this locality. For applications with sufficient switching locality, appropriate choices of topology and mapping in the ICN ensure that no communication request passes through more than two switches. Short communication paths reduce propagation delays and network congestion; resulting in better overall performance. In comparison, other networks are less effective in meeting these objectives. We corroborate our stand by simulating the operation of the ICN, a multi-stage interconnection network and a 2-D Mesh network on communication graphs derived from computations on unstructured grids and sparse matrices