Fully integrated CMOS frequency synthesizer for ZigBee applications

Author

Singh, Saurabh Kumar ; Bhattacharyya, T.K. ; Dutta, Ashudeb

Author_Institution

Dept. of Electr. & Electron. Comput. Eng., IIT, Kharagpur, India

fYear

2005

fDate

3-7 Jan. 2005

Firstpage

780

Lastpage

783

Abstract

A single chip frequency synthesizer compliant with the ZigBee standard is designed in a standard 0.18μ CMOS process. Integer N topology is chosen for the implementation. Synthesizer consists of third order passive loop filter; a CML based programmable frequency divider, a standard tristate PFD, a switch on source topology based charge pump and an on chip quadrature VCO. Simulated settling time is 300μsec. Synthesizer consumes 22mW of power at supply voltage of 1.8 V and occupies an active area of mm².

Keywords

CMOS integrated circuits; analogue integrated circuits; current-mode logic; frequency synthesizers; passive filters; 0.18 micron; 22 mW; 300 musec; CML programmable frequency divider; CMOS RF; ZigBee applications; analog integrated circuits; charge pump; integer N topology; integrated CMOS frequency synthesizer; on chip quadrature VCO; phase locked loop; single chip frequency synthesizer; third order passive loop filter; tristate PFD; CMOS process; Charge pumps; Frequency conversion; Frequency synthesizers; Passive filters; Phase frequency detector; Switches; Topology; Voltage-controlled oscillators; ZigBee; Analog integrated circuits; CMOS RF; Frequency synthesizer; Phase locked loop; ZigBee;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design, 2005. 18th International Conference on

ISSN

1063-9667

Print_ISBN

0-7695-2264-5

Type

conf

DOI

10.1109/ICVD.2005.102

Filename

1383369