DocumentCode :
2370336
Title :
Low-power small-area /spl plusmn/7.28ps jitter 1GHz DLL-based clock generator
Author :
Chulwoo Kim ; In-Chul Hwang ; Sung-Mo Kang
Author_Institution :
University of Illinois, IBM Microelectronics Division
Volume :
2
fYear :
2002
fDate :
7-7 Feb. 2002
Firstpage :
106
Lastpage :
423
Keywords :
Circuits; Clocks; Delay; Frequency conversion; Jitter; Microelectronics; Phase detection; Phase frequency detector; Phase locked loops; Signal design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
Type :
conf
DOI :
10.1109/ISSCC.2002.992157
Filename :
992157
Link To Document :
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