DocumentCode
2370504
Title
An operational amplifier model for test planning at behavioral level
Author
Romero, Eduardo ; Peretti, Gabriela ; Marqués, Carlos
Author_Institution
Electron. & Control Res. Group, National Univ. of Technol., Villa Maria, Argentina
fYear
2005
fDate
3-7 Jan. 2005
Firstpage
812
Lastpage
815
Abstract
A new operational amplifier model for evaluating test strategies at behavioral level is proposed. It presents a set of very appealing characteristics for behavioral-level fault injection and simulation. The matching between behavioral-level model and transistor-level one is evaluated in order to validate the model. A second hypothetical OPA is modeled, for illustrating the use of the model in the evaluation of a test strategy at behavioral level.
Keywords
circuit testing; design for testability; fault simulation; operational amplifiers; behavioral level; fault injection; fault simulation; hypothetical OPA; operational amplifier model; test planning; test strategy evaluation; transistor level; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS technology; Circuit faults; Circuit testing; Design for testability; Electronic equipment testing; Observability; Operational amplifiers; Semiconductor device modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2005. 18th International Conference on
ISSN
1063-9667
Print_ISBN
0-7695-2264-5
Type
conf
DOI
10.1109/ICVD.2005.51
Filename
1383376
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