Title :
Modeling and simulation of packaging substrate effects on radio frequency integrated circuits
Author :
Benedik, Christopher ; Ren, Shaolei
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH, USA
Abstract :
In this paper an analysis of the effects of integrated circuit packaging substrates on a radio frequency (RF) IC is presented. At RF frequencies the effects of packaging parasitics become crucial when assembling an RF system in package (SiP) or integrating a single die with a package. A differential buffer, which had been previously fabricated in a 90nm CMOS process is used as a vehicle to analyze the effects of packaging on performance. The integration of the buffer die with the package is modeled and analyzed.
Keywords :
CMOS integrated circuits; integrated circuit modelling; integrated circuit reliability; radiofrequency integrated circuits; system-in-package; CMOS process; RF IC; RF SiP; RF system in package; integrated circuit packaging substrates; packaging parasitic effects; radiofrequency integrated circuits; size 90 nm; dielectric modeling; integrated circuit packaging; radio frequency integrated circuit; substrate modeling;
Conference_Titel :
Aerospace and Electronics Conference (NAECON), 2012 IEEE National
Conference_Location :
Dayton, OH
Print_ISBN :
978-1-4673-2791-6
DOI :
10.1109/NAECON.2012.6531048