Novel 3-dimensional Dual Control-gate with Surrounding Floating-gate (DC-SF) NAND flash cell for 1Tb file storage application

Author

Whang, SungJin ; Lee, KiHong ; Shin, DaeGyu ; Kim, BeomYong ; Kim, MinSoo ; Bin, JinHo ; Han, JiHye ; Kim, SungJun ; Lee, BoMi ; Jung, YoungKyun ; Cho, SungYoon ; Shin, ChangHee ; Yoo, HyunSeung ; Choi, SangMoo ; Hong, Kwon ; Aritome, Seiichi ; Park, Sung

Author_Institution

Adv. Process Team & Flash Device Dev., Hynix Semicond. Inc., Icheon, South Korea

fYear

2010

fDate

6-8 Dec. 2010

Abstract

A novel 3-dimensional Dual Control-gate with Surrounding Floating-gate (DC-SF) NAND flash cell has been successfully developed, for the first time. The DC-SF cell consists of a surrounding floating gate with stacked dual control gate. With this structure, high coupling ratio, low voltage cell operation (program: 15V and erase: -11V), and wide P/E window (9.2V) can be obtained. Moreover, negligible FG-FG interference (12mV/V) is achieved due to the control gate shield effect. Then we propose 3D DC-SF NAND flash cell as the most promising candidate for 1Tb and beyond with stacked multi bit FG cell (2 ~ 4bit/cell).

Keywords

NAND circuits; flash memories; 3D dual control-gate; DC-SF NAND flash cell; storage capacity 8 Tbit; surrounding floating-gate NAND flash cell;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2010 IEEE International

Conference_Location

San Francisco, CA

ISSN

0163-1918

Print_ISBN

978-1-4424-7418-5

Electronic_ISBN

0163-1918

Type

conf

DOI

10.1109/IEDM.2010.5703447

Filename

5703447