DocumentCode :
2371384
Title :
SiGe HBT technology with fT/fmax of 300GHz/500GHz and 2.0 ps CML gate delay
Author :
Heinemann, B. ; Barth, R. ; Bolze, D. ; Drews, J. ; Fischer, G.G. ; Fox, A. ; Fursenko, O. ; Grabolla, T. ; Haak, U. ; Knoll, D. ; Kurps, R. ; Lisker, M. ; Marschmeyer, S. ; Rücker, H. ; Schmidt, D. ; Schmidt, J. ; Schubert, M.A. ; Tillack, B. ; Wipf, C.
Author_Institution :
IHP, Frankfurt (Oder), Germany
fYear :
2010
fDate :
6-8 Dec. 2010
Abstract :
A SiGe HBT technology featuring fT/fmax/BVCEO=300GHz/500GHz/1.6V and a minimum CML ring oscillator gate delay of 2.0 ps is presented. The speed-improvement compared to our previous SiGe HBT generations originates from lateral device scaling, a reduced thermal budget, and changes of the emitter and base composition, of the salicide resistance as well as of the low-doped collector formation.
Keywords :
Ge-Si alloys; heterojunction bipolar transistors; CML ring oscillator gate delay; HBT technology; frequency 300 GHz; frequency 500 GHz; lateral device scaling; low-doped collector formation; reduced thermal budget; salicide resistance; time 2 ps; voltage 1.6 V;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2010.5703452
Filename :
5703452
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2371384
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