Title :
A 33mW 14b 2.5MSample/s /spl Sigma//spl Delta/ A/D converter in 0.25/spl mu/m digital CMOS
Author :
Reutemann, R. ; Balmelli, P. ; Qiuting Huang
Author_Institution :
Integrated Systems Laboratory, ETH Zurich
Keywords :
Algorithm design and analysis; Capacitors; Clocks; Digital signal processing; Energy consumption; Feedback; Finite impulse response filter; Linearity; Passband; Power filters;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992240
