A Practical Method to Characterize Interconnect in a Fully Loaded System, and its Application to DDR3 Channel

In this paper we formulate and apply a practical method to characterize DDR3 interconnect in a fully loaded system where two-port measurements are not feasible, in most cases due to design topology. To overcome these limitations, we present a technique that allows two-port s-parameters extraction from three VNA or TDR one-port measurements. The method is shown to be highly accurate up to 20 GHz, thus suitable for multi-gigabit signaling system. Additionally, this paper presents time-domain differentiation technique to obtain precise frequency response of a measured TDR waveform, both magnitude and phase. The reflection coefficient can then be used to obtain two-port s-parameters from three TDR measurements. Measurement-simulation correlation of memory channel s-parameters was described and worst-case eye diagrams were computed. This paper is presented in the context of ever-growing requirement for memory channel bandwidth.