Title :
Small Signal and Noise Equivalent Circuit for CMOS 65 nm up to 110 GHz
Author :
Waldhoff, N. ; Andrei, C. ; Gloria, D. ; Danneville, F. ; Dambrine, G.
Author_Institution :
Inst. d´´Electron., de Microelectron. et de Nanotechnol., Villeneuve d´´Ascq
Abstract :
In this paper, a measurement procedure with S parameters and Noise modelling for advanced MOSFET technology is presented. The complete methodology is described from the VNA (Vector Network Analyser) calibration to the simulation results using a complex de-embedding procedure. A noise measurement bench in W band (75-110 GHz) has been developed using the well known F50 method. The comparison between measurements and model simulation shows good agreement up to 110 GHz. Such methodology leads to a robust MOSFET model designated for millimetre wave integrated circuit.
Keywords :
CMOS integrated circuits; S-parameters; integrated circuit modelling; integrated circuit noise; microwave integrated circuits; S parameters; advanced MOSFET technology; complex de-embedding procedure; frequency 75 GHz to 110 GHz; millimetre wave integrated circuit; noise equivalent circuit; noise modelling; size 65 nm; small signal CMOS; vector network analyser calibration; CMOS technology; Calibration; Circuit noise; Circuit simulation; Equivalent circuits; Integrated circuit modeling; MOSFET circuits; Noise measurement; Scattering parameters; Semiconductor device modeling;
Conference_Titel :
Microwave Conference, 2008. EuMC 2008. 38th European
Conference_Location :
Amsterdam
Print_ISBN :
978-2-87487-006-4
DOI :
10.1109/EUMC.2008.4751453
