DocumentCode :
2371860
Title :
A genetic approach to test generation for logic circuits
Author :
Hayashi, Terumine ; Kita, Hidehiko ; Hatayama, Kazumi
Author_Institution :
Fac. of Eng., Mie Univ., Tsu, Japan
fYear :
1994
fDate :
15-17 Nov 1994
Firstpage :
101
Lastpage :
106
Abstract :
This paper presents a genetic algorithm to generate tests for logic circuits. Bit strings corresponding to primary input patterns are evolved into tests for detecting a target fault by genetic operations. Some new techniques, such as a crossover operation based on fault-excitability and fault-drivability, are introduced to achieve high fault coverage. Experimental results show that the genetic approach is effective for solving test generation problem
Keywords :
automatic programming; automatic test software; genetic algorithms; logic testing; bit strings; combinational test generation; crossover operation; fault coverage; fault-drivability; fault-excitability; genetic algorithm; logic circuits; mutation; primary input patterns; target fault; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Fault detection; Genetic algorithms; Genetic engineering; Logic circuits; Logic testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 1994., Proceedings of the Third Asian
Conference_Location :
Nara
Print_ISBN :
0-8186-6690-0
Type :
conf
DOI :
10.1109/ATS.1994.367246
Filename :
367246
Link To Document :
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