DocumentCode :
237196
Title :
WCET-Based Comparison of an Instruction Scratchpad and a Method Cache
Author :
Whitham, Jack ; Schoeberl, Martin
Author_Institution :
Dept. of Comput. Sci., Univ. of York, York, UK
fYear :
2014
fDate :
10-12 June 2014
Firstpage :
301
Lastpage :
308
Abstract :
This paper compares two proposed alternatives to conventional instruction caches: a scratchpad memory (SPM) and a method cache. The comparison considers the true worst-case execution time (WCET) and the estimated WCET bound of programs using either an SPM or a method cache, using large numbers of randomly generated programs. For these programs, we find that a method cache is preferable to an SPM if the true WCET is used, because it leads to execution times that are no greater than those for SPM, and are often lower. However, we also find that analytical pessimism is a significant problem for a method cache. If WCET bounds are derived by analysis, the WCET bounds for an instruction SPM are often lower than the bounds for a method cache. This means that an SPM may be preferable in practical systems.
Keywords :
cache storage; SPM; WCET bound; WCET-based comparison; instruction caches; instruction scratchpad; method cache; randomly generated programs; scratchpad memory; worst-case execution time; Analytical models; Benchmark testing; Hardware; Load modeling; Loading; Mathematical model; Organizations; real-time systems; time-predictable computer architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Object/Component/Service-Oriented Real-Time Distributed Computing (ISORC), 2014 IEEE 17th International Symposium on
Conference_Location :
Reno, NV
ISSN :
1555-0885
Type :
conf
DOI :
10.1109/ISORC.2014.48
Filename :
6899164
Link To Document :
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