Title :
A sequential redundant fault identification scheme and its application to test generation
Author :
Liang, Hsing-Chung ; Lee, Chung Len ; Chen, Jwu E.
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
This work presents an efficient method to identify sequential redundant faults. The method is based on a simple procedure to identify the flip-flops which cannot be initialized and the circuit lines which cannot be controlled to definite values. The redundant faults are classified into four types and the method can identify each type of them. The method has been experimentally incorporated into a test generation system and the results show that it is very efficient in identifying redundant faults and improving the efficiency of a test generation system
Keywords :
automatic testing; fault diagnosis; flip-flops; logic testing; redundancy; sequential circuits; circuit lines; efficiency; flip-flops; initialisability; redundant faults; sequential redundant fault identification; sequential redundant faults; test generation; Circuit faults; Circuit testing; Controllability; Electronic equipment testing; Fault diagnosis; Feedback circuits; Flip-flops; Sequential analysis; Sequential circuits; System testing;
Conference_Titel :
Test Symposium, 1994., Proceedings of the Third Asian
Conference_Location :
Nara
Print_ISBN :
0-8186-6690-0
DOI :
10.1109/ATS.1994.367253
