System level performance analysis of carbon nanotube global interconnects for emerging chip multiprocessors

Although carbon nanotubes (CNTs) have been widely proposed as interconnect fabrics for future ultra deep submicron (UDSM) technologies, there is a lack of system-level performance analysis using these interconnects. In this paper, we investigate the performance of four CNT alternatives that may replace conventional copper (Cu) interconnects at the global interconnect level - (i) single walled CNTs (SWCNTs), (ii) SWCNT bundles, (Hi) multi-walled CNTs (MWCNTs) and (iv) bundles of mixed SWCNTs/MWCNTs. Detailed RLC equivalent circuit models for conventional CNT interconnects are described and used to calculate propagation delays. These models are then incorporated into a system-level environment to estimate the impact of using CNT global interconnects on the overall performance of several multi-core chip multiprocessor (CMP) applications. Our results indicate that MWCNTs can provide the most significant performance speedup among the CNT alternatives (up to 1.9x) over Cu global interconnects. With further improvements in CNT fabrication technology, it is shown that mixed SWCNT/MWCNT bundles and SWCNT bundles can also become viable global interconnect alternatives.