DocumentCode
2372130
Title
On brain-inspired connectivity and hybrid network topologies
Author
Madappuram, Basheer A M ; Beiu, Valeriu ; Kelly, Peter M. ; McDaid, Liam J.
Author_Institution
Dept. of Comput. Syst. Eng., UAE Univ., Al Ain
fYear
2008
fDate
12-13 June 2008
Firstpage
54
Lastpage
61
Abstract
This paper starts from very fresh analyses comparing brainpsilas connectivity with those of well-known network topologies, based on the latest interpretation of Rentpsilas rule. Those analyses have revealed how close the brain comes to the latest Rentpsilas rule averages. On the other hand, all the known network topologies seems to fall short of being strong contenders for mimicking the brain. That is why this paper performs a detailed Rent-based (top-down) connectivity analysis of many two-level hybrid network topologies. This analysis aims to identify those two-level hybrid network topologies which are able to closely mimic brainpsilas connectivity. The ranges of granularity (as given by the total number of gates and the number of processors) where this mimicking is happening are identified. These results should have implications for the design of networks(-on-chip) and for the burgeoning field of multi/many-core processors (in the short to medium term), as well as for investigations on future nano-architectures (in the long run). Complementary results using a bottom-up approach have also been obtained, and will be mentioned.
Keywords
biomimetics; hybrid integrated circuits; integrated circuit design; integrated circuit interconnections; nanoelectronics; network topology; network-on-chip; Rent-based connectivity analysis; bottom-up approach; brain-inspired connectivity; granularity ranges; interconnect topology; many-core processors; multicore processors; nanoarchitectures; networks-on-chip design; neural network; two-level hybrid network topologies; Network topology; Connectivity; Rent’s rule; brain; communication; interconnect topology; nano-architecture; nanotechnology; network topology; neural network;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoscale Architectures, 2008. NANOARCH 2008. IEEE International Symposium on
Conference_Location
Anaheim, CA
Print_ISBN
978-1-4244-2552-5
Electronic_ISBN
978-1-4244-2553-2
Type
conf
DOI
10.1109/NANOARCH.2008.4585792
Filename
4585792
Link To Document