• DocumentCode
    2372436
  • Title

    Fast Minimum-Register Retiming via Binary Maximum-Flow

  • Author

    Hurst, Aaron P. ; Mishchenko, Alan ; Brayton, Robert K.

  • fYear
    2007
  • fDate
    11-14 Nov. 2007
  • Firstpage
    181
  • Lastpage
    187
  • Abstract
    We present a formulation of retiming to minimize the number of registers in a design by iterating a maximum network flow problem. The retiming returned will be the optimum one, which involves the minimum amount of register movement. Existing methods solve this problem as an instance of minimum-cost network flow, an asymptotically and practically more difficult problem than maximum flow. Furthermore, because all flows are unitary, the problem can be simplified to binary marking. Our algorithm has a worst-case bound of O(R^2 E), where R is the number of registers and E the number of pair-wise connections. We demonstrate on a set of circuits that our formulation is 5x faster than minimum-cost-based methods.
  • Keywords
    Delay; Design automation; Joining processes; Logic circuits; Logic gates; Minimization; Registers; Runtime; Timing; Wires; Maximum Flow.; Retiming; Sequential Verification; State Minimization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods in Computer Aided Design, 2007. FMCAD '07
  • Conference_Location
    Austin, TX, USA
  • Print_ISBN
    978-0-7695-3023-9
  • Type

    conf

  • DOI
    10.1109/FAMCAD.2007.31
  • Filename
    4401998