Title :
The high-bandwidth 256kB 2nd-level cache on an itanium microprocessor
Author :
Riedlinger, R. ; Grutkowski, T.
Author_Institution :
Hewlett Packard
Keywords :
Centralized control; Circuits; Clocks; Control systems; Error correction codes; Microprocessors; Protection; Read-write memory; Software performance;
Conference_Titel :
Solid-State Circuits Conference, 2002. Digest of Technical Papers. ISSCC. 2002 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-7335-9
DOI :
10.1109/ISSCC.2002.992285
