On the Optimization of Biasing Conditions in a Digitally-Linearized Power Amplifier

Changing the class of operation in a power amplifier (PA) affects the linearity and the efficiency of the PA. In this paper, the linearization performance and the efficiency enhancement of a Digital Predistorter (DPD) in a transmitter is evaluated with different PA classes. The digital predistorter is implemented in real-time on a Digital Signal Processor (DSP). The PA under test is a 2-stage 2-watt amplifier used in mobile terminals in Inmarsat Broadband Global Area Network (BGAN) systems. The gate bias of the PA is tunable for changing the biasing conditions. It is shown that by driving the PA into class B, we increase the memory effects and therefore reduce the effectiveness of memoryless predistortion. It was also shown that using a memoryless digital predistorter and a PA biased near class AB operation, an efficiency of about 41% is achievable while the BGAN system requirements are met.