Management of critical areas and defectivity data for yield trend modeling

Author

Duvivier, S.B.-F.

Author_Institution

Dept. of Device Eng., STMicroelectron., Crolles

fYear

1998

fDate

2-4 Nov 1998

Firstpage

17

Lastpage

25

Abstract

This paper reports a yield model applied to a large set of defectivity data measured on a 0.35 micron process in ST Crolles plant and critical areas extracted by survey sampling. It takes into account all defect densities measured at the main process steps and determines their respective yield loss. The robustness of the model was tested week by week during three months of production for two high volume devices. The model was then applied wafer by wafer on a new process version

Keywords

integrated circuit modelling; integrated circuit yield; probability; statistical analysis; 0.35 micron; IC manufacture; critical areas management; defect densities; defectivity data; model robustness; production; submicron process; survey sampling; yield trend modeling; Data engineering; Data mining; Density measurement; Engineering management; Integrated circuit modeling; Integrated circuit yield; Pollution measurement; Production; Research and development management; Semiconductor device modeling;

fLanguage

English

Publisher

ieee

Conference_Titel

Defect and Fault Tolerance in VLSI Systems, 1998. Proceedings., 1998 IEEE International Symposium on

Conference_Location

Austin, TX

ISSN

1550-5774

Print_ISBN

0-8186-8832-7

Type

conf

DOI

10.1109/DFTVS.1998.732147

Filename

732147