Title :
C-testable one-dimensional ILAs with respect to path delay faults: theory and applications
Author :
Haniotakis, Th ; Tsiatouhas, Y. ; Nikolos, D.
Author_Institution :
Dept. of Comput. Eng. & Inf., Patras Univ., Greece
Abstract :
In this paper we give, for first time in the open literature, sufficient conditions so that a one-dimensional iterative-logic-array (ILA) is C-testable taking into account the path delay fault model. We give also a method for path selection so as all the selected paths can be tested by a constant number of test-vector pairs. The delay of all other paths is a function of the delays of the selected paths. As example, we consider the ripple-carry adder and the group carry look ahead adder with ripple carry between groups
Keywords :
adders; carry logic; delays; logic arrays; logic testing; C-testable one-dimensional ILAs; group carry look ahead adder; one-dimensional iterative-logic-array; path delay faults; path selection; ripple-carry adder; test-vector pairs; Adders; Application software; Circuit faults; Circuit testing; Delay effects; Electronic mail; Informatics; Propagation delay; Robustness; Sufficient conditions;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 1998. Proceedings., 1998 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-8186-8832-7
DOI :
10.1109/DFTVS.1998.732162
