• DocumentCode
    2373964
  • Title

    Reducing fault sensitivity of microprocessor-based systems by modifying workload structure

  • Author

    Audet, D. ; Masson, S. ; Savaria, Y.

  • Author_Institution
    Quebec Univ., Chicoutimi, Que., Canada
  • fYear
    1998
  • fDate
    2-4 Nov 1998
  • Firstpage
    241
  • Lastpage
    249
  • Abstract
    The use of off-the-shelf components in microprocessor-based systems can limit the applicability of a number of hardware fault-tolerance methods. Software techniques offer attractive solutions to improve the reliability of systems operating in a hostile environment. The fault sensitivity of a system running a critical application obviously depends on the application execution time and the amount of memory it uses. This study shows that the program structure also has a significant influence on fault sensitivity. Program characteristics, such as the size and duration of iterative and sequential sections, are required to determine the sensitivity profile. It is shown that, provided data dependency is not affected one can rearrange the program structure to significantly reduce the average sensitivity of a program. Straightforward analysis of the sensitivity profile allows one to estimate the reduction. A simple example of code rearrangement is described and it is shown that a 50% reduction could be achieved with respect to the initial structure. The magnitude of the reduction varies from one application to another
  • Keywords
    fault tolerant computing; instruction sets; microcomputers; transient analysis; code rearrangement; critical application; fault sensitivity; hardware fault-tolerance methods; iterative sections; microprocessor-based systems; reliability; sensitivity profile; workload structure; Availability; Circuit faults; Control systems; Digital systems; Fault tolerance; Fault tolerant systems; Microprocessors; Microwave integrated circuits; Robust control; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1998. Proceedings., 1998 IEEE International Symposium on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-8832-7
  • Type

    conf

  • DOI
    10.1109/DFTVS.1998.732172
  • Filename
    732172