• DocumentCode
    2374001
  • Title

    Highly reliable systems with differential built-in current sensors

  • Author

    Lo, Jien-Chung

  • Author_Institution
    Dept. of Electr. Eng., Rhode Island Univ., Kingston, RI, USA
  • fYear
    1998
  • fDate
    2-4 Nov 1998
  • Firstpage
    261
  • Lastpage
    269
  • Abstract
    A duplicated system with a differential built-in current sensor (DBICS) method is proposed in this paper as an alternative to the classical TMR designs. The DBICS compares the IDDQ levels of the two copies from a duplicated system and then selects the correct output. Unlike the previously known duplicated-with-self-checking scheme, the proposed method is easy to design and to implement. Further, the system block can be either combinational or sequential circuits and whose size is limited only by the capability of the BICS. The extremely low redundancy level of the proposed method, ≈1% or less, enables a very high reliability performance, more than any existing technique. As the failure rates of modern submicron and deep sub-micron VLSI chips are increasing, the proposed technique will allow the use of modern high-performance chips in highly critical applications
  • Keywords
    CMOS logic circuits; VLSI; built-in self test; combinational circuits; logic testing; redundancy; sequential circuits; CMOS; IDDQ levels; combinational circuits; deep sub-micron VLSI chips; differential built-in current sensors; redundancy level; sequential circuits; system block; Circuit testing; Fabrication; Monitoring; Redundancy; Semiconductor devices; Sensor systems; Sequential circuits; Signal processing; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1998. Proceedings., 1998 IEEE International Symposium on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-8832-7
  • Type

    conf

  • DOI
    10.1109/DFTVS.1998.732174
  • Filename
    732174