Low-profile wake-up radio mechanism for resource-constrained wireless devices

Achieving low power consumption, size reduction, and space optimization are all challenges in resource-constrained wireless devices such as Wireless Sensor Network (WSN) nodes. For instance, WSN nodes use duty cycle to improve their power efficiency, and wake-up radio (WUR) is used as a control channel to wake the nodes up. With its highly flexible features, a field-programmable gate array (FPGA) is one of the attractive candidates for implementing part of WSN devices. In this work, a low-profile WUR scheme is proposed and implemented using FPGA to address the fundamental challenge of power consumption for resource-constrained wireless devices. First, a new design to partition WUR from the remaining main radio component and data processing module using a chipset with flash-freeze technology is proposed and implemented. Second, a new WUR mechanism for register-less single-hop unicast, broadcast, and pseudo multicast (a new one-to-many casting) communication is proposed and implemented. An elimination of unnecessary power consumption results in significant cumulative power reduction for resource-constrained wireless devices with a range of direct neighbor nodes¹.