Characterization of bit transistors in a functional SRAM

A direct bit transistor access (DBTA) scheme is proposed and implemented in 8 Mb SRAMpsilas at 65 nm and 45 nm nodes. It allows, for the first time, characterization of each bit transistor in a functional SRAM. It thus enables (a) collection of transistor data across bit arrays, (b) collection of massive data for statistical analysis such as on transistor mismatch and NBTI Vt drift, and (c) collection of data for fast failure analysis. Measured data are presented.