Title :
A small-delay defect detection technique for dependable LSIs
Author :
Noguchi, Koichiro ; Nose, Koichi ; Ono, Toshinobu ; Mizuno, Masayuki
Author_Institution :
Device Platforms Res. Labs., NEC Corp., Sagamihara
Abstract :
As continuous process scaling produces large-scale chips, small-delay defects become one of the major chip-reliability limiters. Small-delay defect detection techniques for LSI screening have been developed, which can successfully detect outlier chips among normally-distributed chips in a short testing time. In our experiments with 90 nm CMOS 100 MHz test chips, we have successfully detected around 1-ns path-delay shift caused by small-delay defects in only 1/25 of testing time.
Keywords :
CMOS integrated circuits; integrated circuit reliability; large scale integration; CMOS test chips; LSI; chip-reliability limiters; frequency 100 MHz; large-scale chips; small-delay defect detection technique; time 1 ns; wavelength 90 nm; Automatic testing; Built-in self-test; Circuit testing; Clocks; Delay effects; Large scale integration; Logic; Semiconductor device measurement; Time measurement; Velocity measurement;
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
DOI :
10.1109/VLSIC.2008.4585953
