Few Electron Negative Differential Resistance (NDR) devices

Author

Mahapatra, S. ; Pott, V. ; Ionescu, A.M.

Author_Institution

Electron. Lab., Swiss Fed. Inst. of Technol., Lausanne, Switzerland

Volume

1

fYear

2003

fDate

28 Sept.-2 Oct. 2003

Abstract

A comparison between two novel device architectures for Few Electron Negative Differential Resistance (NDR) devices is presented. The first architecture, based on two cross-connected SETs, offers ultra low power dissipation with low current drive (∼nA). The second architecture, founded on CMOS-SET hybrid technology, exhibits high current drive (∼pA) and easy interface with CMOS devices at sub-ambient temperature regime (-1000°C to -1500°C). The proposed device architectures, simulated by Monte Carlo simulation and analytical models, reveal Negative Differential Resistance (NDR) behaviour, which can be tuned by external current bias. The application of proposed NDR architectures as an analog amplifier is also demonstrated.

Keywords

CMOS analogue integrated circuits; MOSFET; Monte Carlo methods; VLSI; integrated circuit modelling; single electron transistors; CMOS-SET hybrid technology; Monte Carlo simulation; analog amplifier; analytical models; cross-connected SETs; few electron negative differential resistance devices; high current drive; low current drive; sub-ambient temperature regime; ultra low power dissipation; Analytical models; Capacitance; Circuits; Electron traps; Laboratories; Leg; Power dissipation; Single electron transistors; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Semiconductor Conference, 2003. CAS 2003. International

Print_ISBN

0-7803-7821-0

Type

conf

DOI

10.1109/SMICND.2003.1251343

Filename

1251343