An SC voltage regulator with novel area-efficient continuous output regulation by dual-branch interleaving control scheme

An integrated 1.8 V to 3.3 V regulated SC voltage regulator is present. The dual branches operate in an interleaving fashion for sake of the area-efficient continuous output regulation. Therefore the output voltage can be continuously regulated with small ripples. The design has been fabricated in a 0.35 mum CMOS process. By operating the prototype at switching frequency of 500 kHz and using an output capacitor of 2 muF, maximum output voltage ripple of 10 mV is maintained for output loading ranging from 10 mA to 180 mA. With the same configurations, a load regulation of 0.0043%/mA and a load transient of less than 25 us for a 150 mA current step are measured.