DocumentCode
2375819
Title
A 0.7-V 100-dB 870-μW digital audio ΣΔ modulator
Author
Park, Hyunsik ; Nam, KiYoung ; Su, David K. ; Vleugels, Katelijn ; Wooley, Bruce A.
Author_Institution
Stanford Univ., Stanford, CA
fYear
2008
fDate
18-20 June 2008
Firstpage
178
Lastpage
179
Abstract
A high-precision, low-voltage, low-power SigmaDelta modulator has been designed using a delayed input feedforward architecture and a tracking multi-bit quantizer employing a single comparator. A 0.18-mum CMOS experimental prototype achieves 100 dB of dynamic range, 100-dB peak SNR and 95-dB peak SNDR for a signal bandwidth of 25 kHz, while consuming only 870 muW of total power from a 0.7-V supply at a 5-MHz sampling rate.
Keywords
CMOS digital integrated circuits; audio equipment; comparators (circuits); feedforward; sigma-delta modulation; CMOS prototypes; digital audio SigmaDelta modulator; feedforward architecture; frequency 5 MHz; multibit quantizer tracking; noise figure 100 dB; single comparator; voltage 0.7 V; CMOS technology; Choppers; Circuits; Delay; Digital modulation; Operational amplifiers; Power dissipation; Quantization; Sampling methods; Voltage; A-to-D conversion; chopper stabilization; feed-forward; sigma-delta modulation;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4244-1804-6
Electronic_ISBN
978-1-4244-1805-3
Type
conf
DOI
10.1109/VLSIC.2008.4585997
Filename
4585997
Link To Document