Title :
A 2.1mW/3.2mW delay-compensated GSM/WCDMA ΣΔ analog-digital converter
Author :
Vadipour, Morteza ; Chen, Calvin ; Yazdi, Ahmad ; Nariman, Mohammad ; Li, Tom ; Kilcoyne, Patrick ; Darabi, Hooman
Author_Institution :
Broadcom Corp., Irvine, CA
Abstract :
A technique to compensate for the harmful excess loop delay in a continuous time SigmaDelta analog-digital converter is presented. With no extra power consumption or area penalty the technique is suitable for variety of applications employing continuous time SigmaDelta analog-digital converters. This work presents a dual mode SigmaDelta ADC for GSM/WCDMA applications with DR of 86 dB/63 dB for 100 KHz/1.92 MHz in a 65 nm CMOS technology with power consumption of 2.1 mW/3.2 mW.
Keywords :
CMOS integrated circuits; cellular radio; code division multiple access; sigma-delta modulation; CMOS technology; GSM/WCDMA applications; continuous time SigmaDelta analog-digital converter; delay-compensated GSM/WCDMA SigmaDelta analog-digital converter; dual mode SigmaDelta ADC; frequency 1.92 MHz; frequency 100 kHz; harmful excess loop delay; power 2.1 mW; power 3.2 mW; size 65 nm; Analog-digital conversion; CMOS technology; Clocks; Degradation; Delay effects; Delta-sigma modulation; Energy consumption; GSM; Multiaccess communication; Signal resolution;
Conference_Titel :
VLSI Circuits, 2008 IEEE Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4244-1804-6
Electronic_ISBN :
978-1-4244-1805-3
DOI :
10.1109/VLSIC.2008.4585998
