The Phoenix Processor: A 30pW platform for sensor applications

Author

Seok, Mingoo ; Hanson, Scott ; Lin, Yu-Shiang ; Foo, Zhiyoong ; Kim, Daeyeon ; Lee, Yoonmyung ; Liu, Nurrachman ; Sylvester, Dennis ; Blaauw, David

Author_Institution

Michigan Univ., Ann Arbor, MI

fYear

2008

fDate

18-20 June 2008

Firstpage

188

Lastpage

189

Abstract

An integrated platform for sensor applications, called the Phoenix Processor, is implemented in a carefully-selected 0.18 mum process with an area of 915 times 915 mum², making on-die battery integration feasible. Phoenix uses a comprehensive sleep strategy with a unique power gating approach, an event-driven CPU with compact ISA, data memory compression, a custom low leakage memory cell, and adaptive leakage management in data memory. Measurements show that Phoenix consumes 29.6 pW in sleep mode and 2.8 pJ/cycle in active mode.

Keywords

integrated memory circuits; microprocessor chips; sensors; Phoenix processor; compact ISA; data memory compression; event-driven CPU; integrated platform; low leakage memory cell; on-die battery integration; power 29.6 pW; power 30 pW; sensor applications; size 0.18 mum; sleep strategy; unique power gating; Batteries; Energy consumption; Energy management; Memory management; Phasor measurement units; Power system management; Random access memory; Sensor systems; System buses; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2008 IEEE Symposium on

Conference_Location

Honolulu, HI

Print_ISBN

978-1-4244-1804-6

Electronic_ISBN

978-1-4244-1805-3

Type

conf

DOI

10.1109/VLSIC.2008.4586001

Filename

4586001