Implementation of a SOPC Based Switched Reluctance Drive

This paper presents the design for a switched reluctance drive based on a SOPC (system on programmable chip) device. All the digital control units, including a speed controller, a trigger phase selector, a PWM unit, a command counter, and a rotor speed counter, are integrated in a complex programmable logic device (CPLD) chip. There is no extra microprocessor in this system. In addition, a current sensorless speed control technique and a trigger angle control scheme are designed in the system control chip to simplify the hardware and improve the performance. In order to validate the performance of the control chip, a simple and low-cost switched reluctance motor drive is implemented for a 1-hp four-phase 8/6 SRM. The hardware is also successfully simplified by the integrated CPLD control chip. Finally, some experiment results are presented to validate the feasibility of the proposed system