DocumentCode :
2377130
Title :
DUT capture using simultaneous logic acquisition
Author :
Sivaram, A.T. ; Fritzsche, William ; Koshi, Toshitaka ; Lai, Nam
Author_Institution :
NPTest, San Jose, CA, USA
fYear :
2002
fDate :
2002
Firstpage :
280
Lastpage :
289
Abstract :
The capability to acquire and display waveforms from a device under test (DUT) perspective, is an essential feature of all automatic test equipment (ATE) systems used in device debug situations. The way the signals are acquired and how they are displayed varies from test system to test system. The tool that performs such functions is called a logic analyzer or a scope. In this paper we describe an acquisition technique which uses strobes in conjunction with capture memory to acquire signals to and from the DUT. What makes this technique new is that the strobe events are designed into the timing IC of the test system. The waveforms are acquired simultaneously on all DUT pins with 4 constant strobes per 5 ns, without any modifications to the timing and waveform memories that are normally done in contemporary ATE architectures.
Keywords :
automatic test equipment; data acquisition; fault location; integrated circuit testing; logic analysers; logic testing; timing circuits; 5 ns; ATE architectures; ATE systems; DUT waveform capture; automatic test equipment systems; capture memory; designed-in strobe events; device debug situations; device under test; logic analyzer; scope; signal acquisition; simultaneous logic acquisition; strobes; test system; test system timing IC; timing; timing memories; waveform acquisition; waveform display; waveform memories; Automatic testing; Circuit testing; Displays; Electronic equipment testing; Hardware; Logic devices; Performance analysis; System testing; Time measurement; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2002. Proceedings. International
ISSN :
1089-3539
Print_ISBN :
0-7803-7542-4
Type :
conf
DOI :
10.1109/TEST.2002.1041770
Filename :
1041770
Link To Document :
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