Simulation of Message Data in a Testbench for the Multifunction Vehicle Bus

Nowadays, marketing an electronic product on time is critical. Hence, the creation flow should assure that the circuit designed will work properly at first. This is true for communication systems in train networks as well. However, verifying the behaviour and performance of such an electronic circuit is not a simple task. This article presents how a simulation tool produces the suitable test vectors in order to validate the interchange of message data among multifunction vehicle bus devices. These proof inputs are VHDL signals forming specific frames, some of them from the master and the other ones from the slaves. These latter frames may be process, message or supervisory data