Title :
Multiscan-based test compression and hardware decompression using LZ77
Author :
Wolff, Francis G. ; Papachristou, Chris
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Case Western Reserve Univ., Cleveland, OH, USA
Abstract :
In this paper we present a new test data compression technique and an associated decompression scheme for testing VLSI chips. Our method is based on our novel use of the much utilized, in software, LZW, particularly LZ77 algorithm. We adapt LZ77 to accommodate bit strings rather than character sets. Moreover, we exploit the large presence of don´t cares in the uncompressed test sets that we generated using commercial ATPG tools. Our decompression scheme makes effective use of the on chip boundary scan during decompression and then feeding the internal multiple scan chains for testing. The hardware overhead cost for this scheme is minimal. Experimental results are provided.
Keywords :
VLSI; automatic test pattern generation; boundary scan testing; data compression; integrated circuit testing; logic testing; ATPG; LZ77; LZW; Lempel-Ziv-Welch algorithm; SoCs; VLSI; bit strings; data compression technique; don´t cares; hardware decompression; hardware overhead cost; internal multiple scan chains; multiscan-based test compression; on chip boundary scan; uncompressed test sets; Automatic test pattern generation; Built-in self-test; Costs; Design automation; Hardware; System-on-a-chip; Tellurium; Testing; Very large scale integration; Wire;
Conference_Titel :
Test Conference, 2002. Proceedings. International
Print_ISBN :
0-7803-7542-4
DOI :
10.1109/TEST.2002.1041776
