• DocumentCode
    2377766
  • Title

    FRITS - a microprocessor functional BIST method

  • Author

    Parvathala, Praveen ; Maneparambil, Kailas ; Lindsay, William

  • Author_Institution
    Intel(R) Corp., Chandler, AZ, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    590
  • Lastpage
    598
  • Abstract
    This paper describes a novel functional Built-in-Self-Test (BIST) method for microprocessors. This technique is based on the fundamental principle that complex chips have embedded functionality that can be used to implement a comprehensive self-test strategy. Functional testing has generally been associated with expensive testers. In order to lower the cost of test, there is a general trend to adopt structural test techniques like scan that enable the use of low cost testers. One of the key advantages of the test method described here is that it enables functional testing of microprocessors on low cost testers. Detailed implementation of this technique, the test generation methodology, the fault grade methodology and silicon results on Intel® Pentium® 4 and Itanium™ family microprocessors are presented.
  • Keywords
    VLSI; built-in self test; integrated circuit testing; logic testing; microprocessor chips; observability; FRITS; Intel microprocessors; Itanium microprocessors; Pentium microprocessors; fault grade methodology; functional BIST method; functional built-in-self-test; low cost testers; microprocessors. testing; test generation methodology; Ambient intelligence; Automatic testing; Built-in self-test; Cost function; Delay effects; Logic testing; Manufacturing processes; Microprocessors; Silicon; Time frequency analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2002. Proceedings. International
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-7542-4
  • Type

    conf

  • DOI
    10.1109/TEST.2002.1041810
  • Filename
    1041810