• DocumentCode
    2377823
  • Title

    Facilitating rapid first silicon debug

  • Author

    Balachandran, Hari ; Butler, Kenneth M. ; Simpson, Neil

  • Author_Institution
    Texas Instrum., Dallas, TX, USA
  • fYear
    2002
  • fDate
    2002
  • Firstpage
    628
  • Lastpage
    637
  • Abstract
    Semiconductor manufacturers aim to deliver products to market within a short span of time in order to gain market share. There are several facets of introducing a product to market - design, manufacturing, first silicon debug, and ramp to volume. Of these, first silicon debug time contributes significantly towards reduced product cycle time if it can be kept short. In this paper, we discuss the infrastructure, design tools, test tools and debug tools required to achieve successful first silicon debug. We describe a production device that employs these infrastructure requirements, thereby demonstrating the advantages of following the guidelines. The paper also highlight the ill effects of not adhering to the guidelines.
  • Keywords
    VLSI; automatic test pattern generation; built-in self test; design for testability; integrated circuit testing; logic testing; ATPG; DFT; debug time; debug tools; design tools; full scan debug; infrastructure requirements; memory debug features; pattern validation; production device; rapid first silicon debug; test pattern generation; test tools; Debugging; Design engineering; Guidelines; Instruments; Job shop scheduling; Process design; Production; Semiconductor device manufacture; Silicon; Testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Test Conference, 2002. Proceedings. International
  • ISSN
    1089-3539
  • Print_ISBN
    0-7803-7542-4
  • Type

    conf

  • DOI
    10.1109/TEST.2002.1041814
  • Filename
    1041814