Re-using DFT logic for functional and silicon debugging test

Author

Gu, Xinli ; Wang, Weili ; Li, Kevin ; Kim, Heon ; Chung, Sung S.

Author_Institution

Cisco Syst. Inc., San Jose, CA, USA

fYear

2002

fDate

2002

Firstpage

648

Lastpage

656

Abstract

This paper presents a technique of re-using DFT logic for system functional and silicon debugging. By re-configuring the existing DFT logic implemented on an ASIC, we are able to 1) test each part of an ASIC in a system environment separately and thus locate manufacturing defects, 2) control and observe any state elements of an ASIC to facilitate system function and silicon debugging, and 3) use structural tests to cover device and their interconnect tests on a board. Therefore, we can achieve debugging and test at both device level and system board level.

Keywords

application specific integrated circuits; automatic test pattern generation; built-in self test; design for testability; integrated circuit testing; logic testing; production testing; ASIC testing; DFT logic reuse; debugging environment; device level; interconnect tests; manufacturing debugging; manufacturing defects location; silicon debugging test; structural tests; system board level; system environment; system functional debugging; Application specific integrated circuits; Circuit testing; Debugging; Design for testability; Hardware; Integrated circuit interconnections; Logic testing; Manufacturing; Silicon; System testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2002. Proceedings. International

ISSN

1089-3539

Print_ISBN

0-7803-7542-4

Type

conf

DOI

10.1109/TEST.2002.1041816

Filename

1041816