DocumentCode
2377994
Title
A new method for testing jitter tolerance of SerDes devices using sinusoidal jitter
Author
Yamaguchi, Takahiro J. ; Soma, Mani ; Ishida, Masahiro ; Musha, Hirobumi ; Malarsie, Louis
Author_Institution
Advantest Labs. Ltd., Miyagi, Japan
fYear
2002
fDate
2002
Firstpage
717
Lastpage
725
Abstract
This paper presents a new method for measuring jitter tolerance of a SerDes receiver using the timing misalignment between the jittered source clock and the recovered clock. A sinusoidal jitter is injected into the serial bit stream. The method derives an equation for estimating BER accurately and is 10× faster than the conventional BER test method The accuracy and test speed of the method are verified by 2.5 Gbps and 10 Gbps-SerDes experiments.
Keywords
automatic test equipment; clocks; digital systems; error statistics; synchronisation; telecommunication equipment testing; timing jitter; 10 Gbit/s; 2.5 Gbit/s; BER; SerDes devices; communication devices; jitter tolerance; jittered source clock; recovered clock; serial bit stream; serializer/deserializer devices; sinusoidal jitter; test speed; timing misalignment; Bit error rate; Circuit testing; Clocks; Costs; Degradation; Equations; Terminology; Timing jitter; Transfer functions; Uncertainty;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2002. Proceedings. International
ISSN
1089-3539
Print_ISBN
0-7803-7542-4
Type
conf
DOI
10.1109/TEST.2002.1041824
Filename
1041824
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