Validating real-time constraints in embedded systems

There is a growing demand for software tools that can assist in designing, analyzing and validating embedded real-time system applications. ESTEREL, a synchronous language, is widely used in the development of embedded systems and hardware/software codesign. We describe a method that uses timed annotations for ESTEREL programs that makes it possible to predict the timing constraints required to be satisfied by the embedded system. Using the specified annotations and the programming environment of ESTEREL, we describe a method and a tool for validating the concrete realization relative to time-annotated ESTEREL specifications. Also, the method derives time constraints to be satisfied by the concrete architectures for realizing the logical specification. We illustrate the technique with examples as well as the structure of the tool implemented