DocumentCode
2378379
Title
High current DPS architecture for sort test challenge
Author
Mallet, Jean-Pascal
Author_Institution
NPTest, Saint-Et7ienne, France
fYear
2002
fDate
2002
Firstpage
913
Lastpage
922
Abstract
Powering VLSI die up to 200 A in sort test, especially for a structural test system, requires a High Current Device Power Supply (HCDPS) able to provide this amount of current within a very fast response. A new HCDPS structure is implemented to overcome the prober interface constraints and sustain applied voltage during die current transitions with high dI/dt.
Keywords
VLSI; automatic test equipment; integrated circuit testing; power supplies to apparatus; production testing; 200 A; VLSI die powering; die current transitions; fast response; high current device power supply; power path model; prober interface constraints; sort test environment; structural test system; Capacitors; Energy consumption; Frequency; High power amplifiers; Impedance; Low voltage; Power supplies; Pulse width modulation; Semiconductor device testing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 2002. Proceedings. International
ISSN
1089-3539
Print_ISBN
0-7803-7542-4
Type
conf
DOI
10.1109/TEST.2002.1041846
Filename
1041846
Link To Document