Title :
CBGA package design for C4 PowerPC microprocessor chips: trade-off between substrate routability and performance
Author :
Huang, Wayne ; Casto, Jim
Author_Institution :
Microprocess. & Memories Technol. Group, Motorola Inc., Austin, TX, USA
Abstract :
Electrical performance and printed circuit board routability tradeoff are studied in ceramic ball grid array packages (CBGAs). CBGA package design is described for a high speed chip with peripheral drivers. Three general types of array patterns are compared. First, the best routability design, where all the power and ground balls on the CBGA are routed in the center area. Second, a design with four pairs of P/G balls moved to the corners of the CBGA is evaluated, resulting in improvement of electrical performance by 50%, as measured by SSN reduction. The reasons for this improvement are analyzed. Third, even more P/G balls are moved closer to the onchip drivers, achieving an additional 30% reduction in SSN. In each case, the implications on board routability and simultaneous switching noise are assessed
Keywords :
circuit analysis computing; circuit noise; digital simulation; integrated circuit interconnections; integrated circuit packaging; microprocessor chips; network routing; printed circuit layout; C4 PowerPC microprocessor chips; CBGA package design; P/G balls; SSN reduction; array patterns; ceramic ball grid array packages; electrical performance; high speed chip; peripheral drivers; printed circuit board routability; simultaneous switching noise; substrate routability; Ceramics; Circuit noise; Conductors; Dielectric substrates; Driver circuits; Electronics packaging; Equivalent circuits; Microprocessor chips; Nonhomogeneous media; Propagation delay;
Conference_Titel :
Electronic Components and Technology Conference, 1994. Proceedings., 44th
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-0914-6
DOI :
10.1109/ECTC.1994.367646