Concurrent packaging architecture design

Author

Cao, L.P. ; Krusius, J.P.

Author_Institution

Sch. of Electr. Eng., Cornell Univ., Ithaca, NY, USA

fYear

1994

fDate

1-4 May 1994

Firstpage

75

Lastpage

80

Abstract

Packaging is one of the primary constraints on the performance and partitioning of high density electronic systems. A concurrent design methodology for the design of the physical structure of such systems is presented here. Architecture, electrical, performance and energy management aspects are included. The CAD tool AUDiT implements this design methodology. The concurrent design capability has been illustrated using a model system derived from the high speed Digital Equipment 3000/500 (Alpha) engineering workstation

Keywords

CAD; concurrent engineering; design engineering; engineering workstations; packaging; AUDiT; CAD tool; concurrent design methodology; electrical performance; energy management; high density electronic systems; high speed Digital Equipment 3000/500 (Alpha) engineering workstation; model system; packaging architecture; partitioning; Computational modeling; Design automation; Design methodology; Electronics packaging; Energy management; Frequency; Integrated circuit interconnections; Partitioning algorithms; Power system modeling; Workstations;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 1994. Proceedings., 44th

Conference_Location

Washington, DC

Print_ISBN

0-7803-0914-6

Type

conf

DOI

10.1109/ECTC.1994.367648

Filename

367648