Title :
Use of DFT techniques in speed grading a 1 GHz+ microprocessor
Author :
Belete, Dawit ; Razdan, Ashutosh ; Schwarz, William ; Raina, Rajesh ; Hawkins, Christopher ; Morehead, Jeff
Author_Institution :
Motorola Inc., Austin, TX, USA
Abstract :
This paper presents a practical case-study of using DFT techniques for speed-grading the Motorola MPC7455, a 1 GHz+ microprocessor. The effectiveness of transition fault detection, path-delay AC-scan patterns and array BIST is compared with that of functional patterns for speed-grading the parts. We discuss the capabilities and challenges of using the DFT methods based on production data.
Keywords :
built-in self test; delays; design for testability; fault location; integrated circuit testing; logic testing; microprocessor chips; 1 GHz; DFT techniques; Motorola MPC7455 microprocessor; functional speed-grading patterns; path-delay AC-scan patterns; production data; speed grading; transition fault detection; Automatic testing; Built-in self-test; Copper; Frequency; Logic arrays; Logic design; Logic testing; Microprocessors; Test pattern generators; Timing;
Conference_Titel :
Test Conference, 2002. Proceedings. International
Print_ISBN :
0-7803-7542-4
DOI :
10.1109/TEST.2002.1041868
