Title :
The Palindrome network for fault-tolerant interconnection
Author :
Liao, Yuyun ; Lu, Mi ; Tzeng, Nian-Feng
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
A new interconnection network composed of 3×3 switching elements is proposed. This new network is called Palindrome interconnection network (PIN) with hardware complexity identical to its counterparts. Compared with its counterparts, the proposed network is fault-tolerant, as totally disjoint paths exist in the network between any source/destination pair. In addition, for a given routing tag in the PIN, all the other equivalent tags which correspond to the same source/destination pair, can be derived easily. Computing an equivalent routing tag from a given routing tag requires the change of two bits of routing tag, irrespective of the network size, suggesting that rerouting logics can be incorporated into the constituent switching element comfortably without compromising performance. The proposed network exhibits higher terminal reliability than its counterparts
Keywords :
fault tolerant computing; multistage interconnection networks; network routing; reliability; Palindrome interconnection network; fault-tolerant interconnection; hardware complexity; rerouting logics; routing tag; source/destination pair; switching elements; terminal reliability; totally disjoint paths; Computer networks; Fault tolerance; Hardware; Logic; Multiprocessing systems; Multiprocessor interconnection networks; Routing; Switching systems; System performance; Telephony;
Conference_Titel :
Parallel and Distributed Processing, 1996., Eighth IEEE Symposium on
Conference_Location :
New Orleans, LA
Print_ISBN :
0-8186-7683-3
DOI :
10.1109/SPDP.1996.570383
