Si Tunneling Field Effect Transistor with Tunnelling In-Line with the Gate Field

As scaling of complementary metal-oxide-semiconductor (CMOS) technology approaches its end, new device concepts are intensively being explored. The tunneling field effect transistor (TFET) is a device proposal that has the potential to outperform CMOS technology both in energy efficiency and speed. This concept, however, has to be improved in such a way that on-currents I_ON are raised to meet industry requirements while maintaining low off-currents I_OFF as well as achieving a subthreshold swing that is below the CMOS limit of 60 mV/dec.