Inevitable use of TAP domains in SOCs

Author

Whetsel, Lee

Author_Institution

Texas Instruments, USA

fYear

2002

fDate

2002

Firstpage

1191

Abstract

This paper discusses the use of test access ports (TAPs) in systems-on-chip (SOC). Topics covered include: IEEE 1149.1, IEEE P1500 and associated standards; TAP controllers; TAP protocols; SOC multiple TAP domains; self-checking; embedded core test standards; core test wrapper architecture; and serial/parallel access test mechanisms.

Keywords

IEEE standards; automatic testing; computer interfaces; embedded systems; integrated circuit testing; logic testing; protocols; system-on-chip; IC test; IEEE 1149.1; IEEE P1500; SOC; TAP controllers; core test wrapper architecture; embedded core test standards; multiple test access port domains; protocols; self-checking; serial/parallel access test mechanisms; systems-on-chip; Bandwidth; Chapters; Computer architecture; Digital integrated circuits; Emulation; Instruments; Integrated circuit testing; Plugs; Protocols; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 2002. Proceedings. International

ISSN

1089-3539

Print_ISBN

0-7803-7542-4

Type

conf

DOI

10.1109/TEST.2002.1041898

Filename

1041898

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2378956