Title :
Architecture implementation of an improved decimal CORDIC method
Author :
Sanchez, Jose-Luis ; Mora, Higinio ; Mora, Jeronimo ; Jimeno, Antonio
Author_Institution :
Comput. Technol. Dept., Univ. of Alicante, Alicante
Abstract :
Since radix-10 arithmetic has been gaining renewed importance over the last few years, high performance decimal systems and techniques are highly demanded. In this paper, a modification of the CORDIC method for decimal arithmetic is proposed so as to improve calculations. The algorithm works with BCD operands and no conversion to binary is needed. A significant reduction in the number of iterations in comparison to the original decimal CORDIC method is achieved. The experiments showing the advantages of the new method are described. Also, the results with regard to delay obtained by means of an FPGA implementation of the method are shown.
Keywords :
digital arithmetic; field programmable gate arrays; signal processing; FPGA implementation; architecture implementation; decimal CORDIC method; Application software; Computer aided manufacturing; Computer architecture; Digital arithmetic; Equations; Field programmable gate arrays; Hardware; Iterative algorithms; Manufacturing processes; Microprocessors;
Conference_Titel :
Computer Design, 2008. ICCD 2008. IEEE International Conference on
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
978-1-4244-2657-7
Electronic_ISBN :
1063-6404
DOI :
10.1109/ICCD.2008.4751846
