DocumentCode :
2379267
Title :
An open architecture for semiconductor test: enablers and challenges
Author :
Jagiela, Mark
fYear :
2002
fDate :
2002
Firstpage :
1211
Abstract :
Summary form only given. The semiconductor test equipment industry has a history of being dominated by proprietary architectures that race to keep pace with increasing device complexity, device performance, and cost pressures. However, recent ATE design trends are resulting in modular hardware and software architectures with single board digital and analog instruments that reside in test head based systems. These new modular systems simplify internal hardware and software interfaces while increasing configuration flexibility. This simplification has enabled the "opening" of the architecture to 3rd party development of instrumentation and software. However, to assure that the functionality, throughput and cost of the system is not compromised, key nuances in the architectural standard still must be considered. As a result of these trends, the technological "barrier to entry" for 3rd party development has been lowered. However, to attract the interest of a significant number of 3rd party developers, the standard must also offer a viable market to warrant their R&D investment. This and other commercial "enablers", rather than technological ones, may be the biggest factor in determining the success of an open architecture.
Keywords :
automatic test equipment; automatic test software; integrated circuit testing; investment; open systems; research and development management; ATE design trends; R&D investment; architectural; commercial enablers; configuration flexibility; cost pressures; device complexity; device performance; instrumentation development; internal hardware interfaces; modular hardware architectures; modular software architectures; modular systems; open architecture; proprietary architectures; semiconductor test equipment industry; single board digital/analog instruments; software development; software interfaces; system cost; system functionality; system throughput; technological barriers; test head based systems; third party development; viable market; Computer architecture; Costs; Hardware; History; Instruments; Semiconductor device testing; Software architecture; Software testing; System testing; Test equipment;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 2002. Proceedings. International
ISSN :
1089-3539
Print_ISBN :
0-7803-7542-4
Type :
conf
DOI :
10.1109/TEST.2002.1041916
Filename :
1041916
Link To Document :
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